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TDA9160 - PAL/NTSC/SECAM decoder/sync processor

General Description

The TDA9160 is an I2C-bus controlled, alignment-free PAL/NTSC/SECAM decoder/processor.

The device contains horizontal and vertical drive outputs and an east-west correction drive circuit.

Key Features

  • Multistandard PAL, NTSC and SECAM.
  • I2C-bus controlled.
  • I2C-bus addresses can be selected by hardware.
  • Alignment free.
  • Few external components.
  • Designed for use with baseband delay lines.
  • Integrated video filters.
  • Horizontal and vertical drive output.
  • East-West correction drive output.
  • Two CVBS inputs.
  • S-VHS input.
  • Vertical divider system.
  • HA synchronization pulse.
  • Two le.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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INTEGRATED CIRCUITS DATA SHEET TDA9160 PAL/NTSC/SECAM decoder/sync processor Preliminary specification File under Integrated Circuits, IC02 December 1991 Philips Semiconductors Preliminary specification PAL/NTSC/SECAM decoder/sync processor FEATURES • Multistandard PAL, NTSC and SECAM • I2C-bus controlled • I2C-bus addresses can be selected by hardware • Alignment free • Few external components • Designed for use with baseband delay lines • Integrated video filters • Horizontal and vertical drive output • East-West correction drive output • Two CVBS inputs • S-VHS input • Vertical divider system • HA synchronization pulse • Two level sandcastle pulse GENERAL DESCRIPTION The TDA9160 is an I2C-bus controlled, alignment-free PAL/NTSC/SECAM decoder/processor.