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TDA9321H - I2C-bus controlled TV input processor

General Description

plastic quad flat package; 64 leads (lead length 1.95 mm); body 14 × 20 × 2.8 mm TDA9321H Horizontal synchronization circuit with switchable time constant for the PLL and Macrovision/subtitle gating Horizontal synchronization pulse output or clamping pulse input/output

Key Features

  • Multistandard Vision IF (VIF) circuit with Phase-Locked Loop (PLL) demodulator.
  • Sound IF (SIF) amplifier with separate input for single reference Quasi Split Sound (QSS) mode and separate Automatic Gain Control (AGC) circuit.
  • AM demodulator without extra reference circuit.
  • Switchable group delay correction circuit which can be used to compensate the group delay pre-correction of the B/G TV standard in multistandard TV receivers.
  • Several (I2C-bus cont.

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Full PDF Text Transcription (Reference)

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INTEGRATED CIRCUITS DATA SHEET TDA9321H I2C-bus controlled TV input processor Preliminary specification File under Integrated Circuits, IC02 1998 Dec 16 Philips Semiconductors Preliminary specification I2C-bus controlled TV input processor FEATURES • Multistandard Vision IF (VIF) circuit with Phase-Locked Loop (PLL) demodulator • Sound IF (SIF) amplifier with separate input for single reference Quasi Split Sound (QSS) mode and separate Automatic Gain Control (AGC) circuit • AM demodulator without extra reference circuit • Switchable group delay correction circuit which can be used to compensate the group delay pre-correction of the B/G TV standard in multistandard TV receivers • Several (I2C-bus controlled) switch outputs which can be used to switch external circuits such as sound traps