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TDA9965A - 40 Msps analog-to-digital interface for CCD cameras

Description

PARAMETER analog supply voltage digital supply voltage digital output supply voltage analog supply current digital supply current digital output supply current ADC resolution CTH input voltage (peak-to-peak value) CTH output amplifier gain PGA dynamic range maximum pixel frequency total noise from CT

Features

  • Clamp and Track/Hold (CTH) circuit with adjustable bandwidth, Programmable Gain Amplifier (PGA), 12-bit Analog-to-Digital Converter (ADC) and reference regulator.
  • Fully programmable via a 3-wire serial interface.
  • Sampling frequency up to 40 MHz.
  • PGA gain from 0 to 36 dB (in 0.05 dB steps).
  • CTH programmable bandwidth from 35 to 284 MHz typical.
  • Standby mode (20 mW typical).
  • Low power consumption of only 425 mW typical.
  • 5 V o.

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Datasheet Details

Part number TDA9965A
Manufacturer NXP
File Size 182.38 KB
Description 40 Msps analog-to-digital interface for CCD cameras
Datasheet download datasheet TDA9965A Datasheet
Additional preview pages of the TDA9965A datasheet.

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Full PDF Text Transcription

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www.DataSheet4U.com INTEGRATED CIRCUITS DATA SHEET TDA9965A 12-bit, 5.0 V, 40 Msps analog-to-digital interface for CCD cameras Product specification Supersedes data of 2003 Nov 26 2004 Jul 05 www.DataSheet4U.com Philips Semiconductors Product specification 12-bit, 5.0 V, 40 Msps analog-to-digital interface for CCD cameras FEATURES • Clamp and Track/Hold (CTH) circuit with adjustable bandwidth, Programmable Gain Amplifier (PGA), 12-bit Analog-to-Digital Converter (ADC) and reference regulator • Fully programmable via a 3-wire serial interface • Sampling frequency up to 40 MHz • PGA gain from 0 to 36 dB (in 0.05 dB steps) • CTH programmable bandwidth from 35 to 284 MHz typical • Standby mode (20 mW typical) • Low power consumption of only 425 mW typical • 5 V operation and 3 to 5.
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