UJA1023 Overview
The UJA1023 is a stand-alone Local Interconnect Network (LIN) I/O slave that replaces basic ponents monly used in electronic control units for input and output handling. The UJA1023 contains a LIN 2.0 controller, an integrated LIN transceiver which is LIN 2.0 / SAE J2602 pliant and LIN 1.3 patible, a 30 kΩ termination resistor necessary for LIN-slaves, and eight I/O ports which are configurable via the LIN bus. An automatic bit rate synchronization circuit adapts to any (master) bit rate between 1 kbit/s and 20 kbit/s. For this, an oscillator is integrated. The LIN protocol will be handled autonomously and both Node Address (NAD) and LIN frame Identifier (ID) programming will be done by a master request and an optional slave response message in bination with a daisy chain or plug coding function. The eight bidirectional I/O pins are configurable via LIN bus messages and can have the...
UJA1023 Key Features
- Automatic bit rate synchronization to any (master) bit rate between 1 kbit/s and 20 kbit/s
- Integrated LIN 2.0 / SAE J2602 transceiver (including 30 kΩ termination resistor)
- Eight bidirectional I/O pins
- 4 × 2, 4 × 3, or 4 × 4 switch matrix to support reading and supplying a maximum
- Outputs configurable as high-side and/or low-side driver and as cyclic or PWM driver
- 8-bit ADC
- Advanced low-power behavior
- On-chip oscillator
- Node Address (NAD) configuration via daisy chain or plug coding
- Inputs supporting local wake-up and edge capturing