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54ACT163 - Synchronous Presettable Binary Counter

Download the 54ACT163 datasheet PDF. This datasheet also covers the 54AC163 variant, as both devices belong to the same synchronous presettable binary counter family and are provided as variant models within a single manufacturer datasheet.

General Description

The ’AC/’ACT163 are high-speed synchronous modulo-16 binary counters.

They are synchronously presettable for application in programmable dividers and have two types of Count Enable inputs plus a Terminal Count output for versatility in forming synchronous multistage counters.

Key Features

  • n ICC reduced by 50% Logic Symbols Pin Names CEP CET CP SR P0.
  • P3 PE Q0.
  • Q3 DS100275-1.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (54AC163_NationalSemiconductor.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

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54ACT16470 16-BIT REGISTERED TRANSCEIVERS Texas Instruments

Other Datasheets by National Semiconductor (now Texas Instruments)

Part Number Description
54ACT161 Synchronous Presettable Binary Counter
54ACT169 4-Stage Synchronous Bidirectional Counter
54ACT109 Dual JK Positive Edge-Triggered Flip-Flop
54ACT112 Dual JK Negative Edge-Triggered Flip-Flop
54ACT138 1-of-8 Decoder/Demultiplexer

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
www.DataSheet4U.com 54AC163 • 54ACT163 Synchronous Presettable Binary Counter November 1998 54AC163 • 54ACT163 Synchronous Presettable Binary Counter General Description The ’AC/’ACT163 are high-speed synchronous modulo-16 binary counters. They are synchronously presettable for application in programmable dividers and have two types of Count Enable inputs plus a Terminal Count output for versatility in forming synchronous multistage counters. The ’AC/ ’ACT163 has a Synchronous Reset input that overrides counting and parallel loading and allows the outputs to be simultaneously reset on the rising edge of the clock.