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54ACT299 - 8-Input Universal Shift/Storage Register

Download the 54ACT299 datasheet PDF. This datasheet also covers the 54AC299 variant, as both devices belong to the same 8-input universal shift/storage register family and are provided as variant models within a single manufacturer datasheet.

General Description

The ’AC/’ACT299 is an 8-bit universal shift/storage register with TRI-STATE ® outputs.

Four modes of operation are possible: hold (store), shift left, shift right and load data.

The parallel load inputs and flip-flop outputs are multiplexed to reduce the total number of package pins.

Key Features

  • n ICC and IOZ reduced by 50% Ordering Code: Logic Symbols Connection Diagrams Pin Assignment for DIP and Flatpak DS100252-1 IEEE/IEC DS100252-2 Pin Assignment for LCC DS100252-3 DS100252-4 TRI-STATE ® is a registered trademark of National Semiconductor Corporation. FACT ® is a registered trademark of Fairchild Semiconductor Corporation. © 1998 National Semiconductor Corporation DS100252 www. national. com Connection Diagrams Pin Names CP DS0 DS7 S0, S1 MR OE1, OE2 I/O0.
  • I/O7 Q0,.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (54AC299_NationalSemiconductor.pdf) that lists specifications for multiple related part numbers.

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
www.DataSheet4U.com 54ACC299 • 54ACT299 8-Input Universal Shift/Storage Register with Common Parallel I/O Pins September 1998 54AC299 • 54ACT299 8-Input Universal Shift/Storage Register with Common Parallel I/O Pins General Description The ’AC/’ACT299 is an 8-bit universal shift/storage register with TRI-STATE ® outputs. Four modes of operation are possible: hold (store), shift left, shift right and load data. The parallel load inputs and flip-flop outputs are multiplexed to reduce the total number of package pins. Additional outputs are provided for flip-flops Q0, Q7 to allow easy serial cascading. A separate active LOW Master Reset is used to reset the register.