Description
These buffers line drivers are designed to improve both the performance and PC board density of TRI-STATE buffers drivers employed as memory-address drivers clock drivers and bus-oriented transmitters receivers Featuring 400 mV of hysteresis at each low current PNP data line input they provide impro
Features
- Y TRI-STATE outputs drive bus lines directly Y PNP inputs reduce DC loading on bus lines Y Hysteresis at data inputs improves noise margins
Y Typical IOL (sink current) 54LS 12 mA
74LS 24 mA
Y Typical IOH (source current) 54LS b12 mA
74LS b15 mA
Y Typical propagation delay times
Inverting
10 5 ns
Noninverting 12 ns
Y Typical enable disable time 18 ns
Y Typical power dissipation (enabled)
Inverting
130 mW
Noninverting 135 mW
Connection Diagram
Dual-In-Line Package
TL F 8442.
54LS244 Datasheet
