Download ADC12DS095 Datasheet PDF
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ADC12DS095 Description

This is Advance Information for products currently in development. ALL specifications are design targets and are subject to change. The digital outputs are serialized and provided on differential LVDS signal pairs.

ADC12DS095 Key Features

  • 1 GHz Full Power Bandwidth Internal sample-and-hold circuit and precision reference Low power consumption Clock Duty Cyc