ADC12DS105 - A/D Converter

This page provides the datasheet information for the ADC12DS105, a member of the ADC12DS065 A/D Converter family.

Product Overview

National Semiconductor

Part number	ADC12DS105
Manufacturer	National Semiconductor
File Size	606.45 KB
Description	A/D Converter
Datasheet	ADC12DS105 Datasheet
Additional preview pages of the ADC12DS105 datasheet.

NOTE: This is Advance Information for products currently in development.

ALL specifications are design targets and are subject to change.

1 GHz Full Power Bandwidth Internal sample-and-hold circuit and precision reference Low power consumption Clock Duty Cycle Stabilizer Single +3.3V supply operation Offset binary or 2's complement output data format Serial LVDS Outputs 60-pin LLP package, (9x9x0.8mm, 0.5mm pin-pitch) Key Specifications.
For ADC12DS105 Resolution Conversion Rate SNR (fIN = 240 MHz) SFDR (fIN = 240 MHz) Full Power Bandwidth Po.

Other Datasheets by National Semiconductor

Published: Apr 9, 2007 |