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ADC12DS105
www.ti.com
SNAS382E – SEPTEMBER 2006 – REVISED APRIL 2013
ADC12DS105 Dual 12-Bit, 105 MSPS A/D Converter with Serial LVDS Outputs
Check for Samples: ADC12DS105
FEATURES
1
•2 Clock Duty Cycle Stabilizer • Single +3.0 or 3.3V Supply Operation • Serial LVDS Outputs • Serial Control Interface • Overrange Outputs • 60-pin WQFN Package, (9x9x0.8mm, 0.5mm
pin-pitch)
APPLICATIONS
• High IF Sampling Receivers • Wireless Base Station Receivers • Test and Measurement Equipment • Communications Instrumentation • Portable Instrumentation
KEY SPECIFICATIONS
• Resolution: 12 Bits • Conversion Rate: 105 MSPS • SNR (fIN = 240 MHz): 68.