Description
These minimum skew clock drivers are designed for Clock Generation and Support (CGS) applications operating at high frequencies This device guarantees minimum output skew across the outputs of a given device Skew parameters are also provided as a means to measure duty cycle requirements as those fou
Features
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Guaranteed 300 ps pin-to-pin skew (tOSHL and tOSLH) Implemented on National’s FACTTM family process 1 input to 4 outputs low skew clock distribution Symmetric output current drive 24 mA IOH IOL Industrial temperature of b40 C to a 85 C 8-pin SOIC package Low dynamic power consumption above 20 MHz Guaranteed 2 kV ESD protection
Logic Symbol
Connection Diagrams
Pin Assignment SOIC (M)
TL F 11752.
- 1
TL F 11752.
- 2
The output pins act as a single entity and will.
CGS74CT2524 Datasheet
