Description
These minimum skew clock drivers are designed for Clock Generation and Support (CGS) applications operating at high frequencies This device guarantees minimum output skew across the outputs of a given device The ’2527 is a minimum skew clock driver with one input driving eight outputs specifically d
Features
- Y Guaranteed and tested 300 ps Pin-to-pin skew (tOSHL and tOSLH)
Y High performance version of existing CGS74CT2525 Y Implemented on National’s FACTTM family process Y 1 input to 8 outputs low skew clock distribution Y Symmetric output current drive 24 mA IOH IOL Y Industrial temperature of b40 C to a85 C Y 28 pin PLCC for optimum skew performance Y Guaranteed 2K volts ESD protection
Logic Symbols
Connection Diagram
Pin Assignment for PLCC
TL F 10981.
- 2
Functional.