CGS74LCT801 Datasheet PDF - National Semiconductor Low Skew PLL 1-to-8 CMOS Clock Driver Specs

CGS74LCT801 - Low Skew PLL 1-to-8 CMOS Clock Driver

This page provides the datasheet information for the CGS74LCT801, a member of the CGS64C800 Low Skew PLL 1-to-8 CMOS Clock Driver family.

Datasheet Summary

Description

These minimum skew clock drivers are designed for Clock Generation and Support (CGS) applications operating at high frequencies utilizing a phase lock loop.

Datasheet Details

Part number	CGS74LCT801
Manufacturer	National Semiconductor
File Size	402.18 KB
Description	Low Skew PLL 1-to-8 CMOS Clock Driver
Datasheet	CGS74LCT801 Datasheet
Additional preview pages of the CGS74LCT801 datasheet.

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Full PDF Text Transcription

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o ~National ~ Semiconductor PRELIMINARY eecnn;) .0...I.:.l..o..o.. CGS64/74C800/801/802, CGS64/74CT800/801/802, o0I:loo CD Q CGS/74LCT800/801/802 .Q..... CD Low Skew PLL 1-to-8 CMOS Clock Driver .Q-...... CD General Description Q ,!') These minimum skew clock drivers are designed for Clock Generation and Support (CGS) applications operating at high frequencies utilizing a phase lock loop. The phase lock loop allows for outputs to lock-on to either SyncLO or SyncL1 inputs, which could be operating at different frequencies. This product is ideal for applications requiring clock synchronization and distribution of either on or off board components.

Published: Jan 12, 2025 |