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CLC5902 - Dual Digital Tuner/AGC

Datasheet Summary

Description

The CLC5902 block diagram is shown in Figure 2.

The CLC5902 contains two identical digital down-conversion (DDC) circuits.

Features

  • n 52MSPS Operation n Two Independent Channels with n n n n n n n n n n n n 14-bit inputs Greater than 100 dB image rejection Greater than 100 dB spurious free dynamic range 0.02 Hz tuning resolution User Programmable AGC Channel Filters include a Fourth Order CIC followed by 21-tap and 63-tap Symmetric FIRs FIR filters process 21-bit Data with 16-bit Programmable Coefficients Flexible output formats include 12-bit Floating Point or 8, 16, 24, and 32 bit Fixed Point Serial and Parallel output por.

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Full PDF Text Transcription

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May 1999 CLC5902 Dual Digital Tuner/AGC N CLC5902 Dual Digital Tuner/AGC 0 0 General Overview The CLC5902 Dual Digital Tuner/AGC IC is a two channel digital downconverter (DDC) with integrated automatic gain control (AGC). The CLC5902 is a key component in the Diversity Receiver Chipset (DRCS) which includes one CLC5902 Dual Digital Tuner/AGC, two CLC5956 12-bit analog-to-digital converters (ADCs), and two CLC5526 digitally controlled variable gain amplifiers (DVGAs). A block diagram for a Diversity Receiver Chipset based narrowband communications system is shown in Figure 1. This system allows direct IF sampling of signals up to 300MHz for enhanced receiver performance and reduced system costs.
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