DM54LS156 - Dual 2-Line to 4-Line Decoders/Demultiplexers
Description
These TTL circuits feature dual 1-line-to-4-line demultiplexers with individual strobes and common binary-address inputs in a single 16-pin package When both sections are enabled by the strobes the common address inputs sequentially select and route associated input data to the appropriate output of
DM54LS109A- Dual Positive-Edge-Triggered J-K Flip-Flops with Preset/ Clear/ and Complementary Outputs
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54LS155 DM54LS155 DM74LS155 54LS156 DM54LS156 DM74LS156 Dual 2-Line to 4-Line Decoders Demultiplexers
June 1989
54LS155 DM54LS155 DM74LS155 54LS156 DM54LS156 DM74LS156 Dual 2-Line to 4-Line Decoders Demultiplexers
General Description
These TTL circuits feature dual 1-line-to-4-line demultiplexers with individual strobes and common binary-address inputs in a single 16-pin package When both sections are enabled by the strobes the common address inputs sequentially select and route associated input data to the appropriate output of each section The individual strobes permit activating or inhibiting each of the 4-bit sections as desired Data applied to input C1 is inverted at its outputs and data applied at C2 is true through its outputs The inverter following the C1 data input permits use a
DM54LS156 Datasheet
