DM74LS107A is Dual Negative-Edge- Triggered Master-Slave J-K Flip-Flops manufactured by National Semiconductor.
| Part Number | Description |
|---|---|
| DM74LS10 | Triple 3-Input NAND Gates |
| DM74LS109A | Dual Positive-Edge-Triggered J-K Flip-Flops |
| DM74LS11 | Triple 3-Input AND Gates |
| DM74LS112A | NEGATIVE-EDGE-TRIGERED MASTER-SLAVE J-K FLIP-FLOPS |
| DM74LS125A | Quad TRI-STATE Buffers |
This device contains two independent negative-edge-triggered J-K flip-flops with plementary outputs The J and K data is processed by the flip-flops on the falling edge of the clock pulse The clock triggering occurs at a voltage level and is not directly.
