DM74LS256 Key Features
- Q3a Q0b
- Q3b Description
- Part: DM74LS256
- Manufacturer: National Semiconductor
- Size: 127.06 KB
Related National Semiconductor Datasheets
| Part Number | Description |
|---|---|
| DM74LS251 | TRI-STATE Data Selectors/Multiplexers |
| DM74LS253 | TRI-STATE Data Selectors/Multiplexers |
| DM74LS257 | TRI-STATE Quad 2-Data Selectors/Multiplexers |
| DM74LS257B | TRI-STATE Quad 2-Data Selectors/Multiplexers |
| DM74LS258 | TRI-STATE Quad 2-Data Selectors/Multiplexers |
DM74LS256 Description
The ’LS256 is a dual 4-bit addressable latch with mon control inputs these include two Address inputs (A0 A1) an active LOW enable input (E) and an active LOW Clear input (CL) Each latch has a Data input (D) and four outputs (Q0 Q3) When the Enable (E) is.