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DS3885 - BTL Arbitration Transceiver

General Description

The DS3885 is one in a series of transceivers designed specifically for the implementation of high performance Futurebus a and proprietary bus interfaces The DS3885 Arbitration Transceiver is designed to conform to IEEE 1194 1 (Backplane Transceiver Logic BTL) as specified in the IEEE 896 2 Futurebu

Key Features

  • Y Y Y Y Y Y Y Y Y Y Y Y Y Y 9-bit inverting BTL transceiver Meets IEEE 1194 1 standard on Backplane Transceiver Logic (BTL) Includes on chip competition logic and parity checking Supports live insertion Glitch free power-up down protection Typically less than 5 pF bus-port capacitance Low bus-port voltage swing (typically 1V) at 80 mA Open collector bus-port output allows Wired-OR connection Exceeds 2 kV ESD testing (Human Body Model) Individual bus-port ground pins minimize ground bounce C.

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DS3885 BTL Arbitration Transceiver January 1994 DS3885 BTL Arbitration Transceiver General Description The DS3885 is one in a series of transceivers designed specifically for the implementation of high performance Futurebus a and proprietary bus interfaces The DS3885 Arbitration Transceiver is designed to conform to IEEE 1194 1 (Backplane Transceiver Logic BTL) as specified in the IEEE 896 2 Futurebus a specification The Arbitration Transceiver incorporates the competition logic internally which simplifies the implementation of a Futurebus a application by minimizing the on board logic required The DS3885 driver output configuration is an NPN open collector which allows Wired-OR connection on the bus Each driver output incorporates a Schottky diode in series with its collector to isolate