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DS3883A - BTL 9-Bit Data Transceiver

General Description

The DS3883A is one in a series of transceivers designed specifically for the implementation of high performance Futurebus+ and proprietary bus interfaces.

BTL) as specified in the IEEE 8

Key Features

  • n 9-bit Inverting BTL transceiver meets IEEE 1194.1 standard on Backplane Transceiver Logic (BTL) n Supports live insertion n Glitch free power-up/down protection n Typically less than 5 pF bus-port capacitance n Low bus-port voltage swing (typically 1V) at 80 mA n Open collector bus-port output allows Wired-OR n Controlled rise and fall time to reduce noise coupling n TTL compatible driver and control inputs n Built in bandgap reference with separate QV CC and QGND pins for precise receiver thr.

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DS3883A BTL 9-Bit Data Transceiver July 1998 DS3883A BTL 9-Bit Data Transceiver General Description The DS3883A is one in a series of transceivers designed specifically for the implementation of high performance Futurebus+ and proprietary bus interfaces. The DS3883A, is a BTL 9-bit Transceiver designed to conform to IEEE 1194.1 (Backplane Transceiver Logic — BTL) as specified in the IEEE 896.2 Futurebus+ specification. Utilization of the DS3883A simplifies the implementation of byte wide address/data with parity lines and also may be used for the Futurebus+ status, tag and command lines. The DS3883A driver output configuration is an NPN open collector which allows Wired-OR connection on the bus.