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DS7834 - Quad TRI-STATE Bus Transceivers

General Description

This family of TRI-STATE bus transceivers offers extreme versatility in bus organized data transmission systems The data bus may be unterminated or terminated DC or AC at one or both ends Drivers in the third (high impedance) state load the data bus with a negligible leakage current The receiver inp

Key Features

  • Y Y Y Y Receiver hysteresis Receiver noise immunity Bus terminal current for normal VCC or VCC e 0V Receivers Sink Source Drivers Sink 400 mV typ 1 4V typ 80 mA max 16 mA at 0 4V max 2 0 mA (Mil) at 2 4V min 5 2 mA (Com) at 2 4V min Y Y Y Y Y 50 mA at 0 5V max 32 mA at 0 4V max Source 10 4 mA (Com) at 2 4V min 5 2 mA (Mil) at 2 4V min Drivers have TRI-STATE outputs Receivers have TRI-STATE outputs Capable of driving 100X DC-terminated Buses Compatible with Series 54 74 Connection Diagram.

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