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DS90CR285 - +3.3V Rising Edge Data Strobe LVDS

General Description

The DS90CR285 transmitter converts 28 bits of CMOS/TTL data into four LVDS (Low Voltage Differential Signaling) data streams.

A phase-locked transmit clock is transmitted in parallel with the data streams over a fifth LVDS link.

Key Features

  • n n n n n n n n n n n n n n Single +3.3V supply Chipset (Tx + Rx) power consumption < 250 mW (typ) Power-down mode ( < 0.5 mW total) Up to 231 Megabytes/sec bandwidth Up to 1.848 Gbps data throughput Narrow bus reduces cable size 290 mV swing LVDS devices for low EMI +1V common mode range (around +1.2V) PLL requires no external components Low profile 56-lead TSSOP package Rising edge data strobe Compatible with TIA/EIA-644 LVDS standard ESD Rating > 7 kV Operating Temperature:.
  • 40˚C to +.

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📁 Similar Datasheet

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DS90CR285 +3.3V Rising Edge Data Strobe LVDS Texas Instruments
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Other Datasheets by National Semiconductor (now Texas Instruments)

Part Number Description
DS90CR281 28-Bit Channel Link
DS90CR282 28-Bit Channel Link
DS90CR283 28-Bit Channel Link
DS90CR284 28-Bit Channel Link
DS90CR286 +3.3V Rising Edge Data Strobe LVDS

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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DS90CR285/DS90CR286 +3.3V Rising Edge Data Strobe LVDS 28-Bit Channel Link-66 MHz March 1999 DS90CR285/DS90CR286 +3.3V Rising Edge Data Strobe LVDS 28-Bit Channel Link-66 MHz General Description The DS90CR285 transmitter converts 28 bits of CMOS/TTL data into four LVDS (Low Voltage Differential Signaling) data streams. A phase-locked transmit clock is transmitted in parallel with the data streams over a fifth LVDS link. Every cycle of the transmit clock 28 bits of input data are sampled and transmitted. The DS90CR286 receiver converts the LVDS data streams back into 28 bits of CMOS/TTL data. At a transmit clock frequency of 66 MHz, 28 bits of TTL data are transmitted at a rate of 462 Mbps per LVDS data channel. Using a 66 MHz clock, the data throughput is 1.848 Gbit/s (231 Mbytes/s).