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DS90CR285 - +3.3V Rising Edge Data Strobe LVDS

General Description

The DS90CR285 transmitter converts 28 bits of LVCMOS/LVTTL data into four LVDS (Low Voltage Differential Signaling) data streams.

A phase-locked transmit clock is transmitted in parallel with the data streams over a fifth LVDS link.

Key Features

  • 1.
  • 2 Single +3.3V Supply.
  • Chipset (Tx + Rx) Power Consumption.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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DS90CR285, DS90CR286 www.ti.com SNLS130C – MARCH 1999 – REVISED MARCH 2013 DS90CR285/DS90CR286 +3.3V Rising Edge Data Strobe LVDS 28-Bit Channel Link-66 MHz Check for Samples: DS90CR285, DS90CR286 FEATURES 1 •2 Single +3.3V Supply • Chipset (Tx + Rx) Power Consumption <250 mW (typ) • Power-Down Mode (<0.5 mW total) • Up to 231 Megabytes/sec Bandwidth • Up to 1.848 Gbps Data Throughput • Narrow Bus Reduces Cable Size • 290 mV Swing LVDS Devices for Low EMI • +1V Common Mode Range (Around +1.