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DS90CR288 - +3.3V Rising Edge Data Strobe LVDS

General Description

The DS90CR287 (see DS90CR287/288A datasheet) transmitter converts 28 bits of CMOS/TTL data into four LVDS (Low Voltage Differential Signaling) data streams.

A phaselocked transmit clock is transmitted in parallel with the data streams over a fifth LVDS link.

Key Features

  • n 20 to 75 MHz shift clock support n 50% duty cycle on receiver output clock n Best-in-Class Set & Hold Times on TxINPUTs and RxOUTPUTs n Low power consumption n Tx + Rx Powerdown mode < 400µW (max) n ± 1V common-mode range (around +1.2V) n Narrow bus reduces cable size and cost n Up to 2.10 Gbps throughput n Up to 262.5 Mbytes/sec bandwidth n 345 mV (typ) swing LVDS devices for low EMI n PLL requires no external components n Rising edge data strobe n Compatible with TIA/EIA-644 LVDS standard n.

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📁 Similar Datasheet

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Other Datasheets by National Semiconductor (now Texas Instruments)

Part Number Description
DS90CR288A 28-Bit Channel Link
DS90CR281 28-Bit Channel Link
DS90CR282 28-Bit Channel Link
DS90CR283 28-Bit Channel Link
DS90CR284 28-Bit Channel Link

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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DS90CR288 +3.3V Rising Edge Data Strobe LVDS 28-Bit Channel Link Receiver - 75 MHz May 2002 DS90CR288 +3.3V Rising Edge Data Strobe LVDS 28-Bit Channel Link Receiver - 75 MHz General Description The DS90CR287 (see DS90CR287/288A datasheet) transmitter converts 28 bits of CMOS/TTL data into four LVDS (Low Voltage Differential Signaling) data streams. A phaselocked transmit clock is transmitted in parallel with the data streams over a fifth LVDS link. Every cycle of the transmit clock 28 bits of input data are sampled and transmitted. The DS90CR288 receiver converts the four LVDS data streams back into 28 bits of CMOS/TTL data. At a transmit clock frequency of 75 MHz, 28 bits of TTL data are transmitted at a rate of 525 Mbps per LVDS data channel.