DS90CR288
Overview
The DS90CR287 (see DS90CR287/288A datasheet) transmitter converts 28 bits of CMOS/TTL data into four LVDS (Low Voltage Differential Signaling) data streams. A phaselocked transmit clock is transmitted in parallel with the data streams over a fifth LVDS link.
- 20 to 75 MHz shift clock support
- 50% duty cycle on receiver output clock
- Best-in-Class Set & Hold Times on TxINPUTs and RxOUTPUTs
- Low power consumption
- Tx + Rx Powerdown mode < 400µW (max) n ± 1V common-mode range (around +1.2V)
- Narrow bus reduces cable size and cost
- Up to 2.10 Gbps throughput
- Up to 262.5 Mbytes/sec bandwidth
- 345 mV (typ) swing LVDS devices for low EMI
- PLL requires no external components
