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DS91M040 - 125 MHz Quad M-LVDS Transceiver

General Description

The DS91M040 is a quad M-LVDS transceiver designed for driving / receiving clock or data signals to / from up to four multipoint networks.

Key Features

  • DC - 125 MHz / 250 Mbps low jitter, low skew, low power operation.
  • Wide Input Common Mode Voltage Range allows up to.
  • ±2V of GND noise Conforms to TIA/EIA-899 M-LVDS Standard Pin selectable M-LVDS receiver type (1 or 2) Controlled transition times (2.0 ns typ) minimize reflections 8 kV ESD on M-LVDS I/O pins protects adjoining components.
  • Flow-through pinout simplifies PCB layout.
  • Small 5 mm x 5 mm LLP-32 space saving package.

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Other Datasheets by National Semiconductor (now Texas Instruments)

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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DS91M040 125 MHz Quad M-LVDS Transceiver May 13, 2008 DS91M040 125 MHz Quad M-LVDS Transceiver General Description The DS91M040 is a quad M-LVDS transceiver designed for driving / receiving clock or data signals to / from up to four multipoint networks. M-LVDS (Multipoint LVDS) is a new family of bus interface devices based on LVDS technology specifically designed for multipoint and multidrop cable and backplane applications. It differs from standard LVDS in providing increased drive current to handle double terminations that are required in multipoint applications. Controlled transition times minimize reflections that are common in multipoint configurations due to unterminated stubs.