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DS91M040 - 125 MHz Quad M-LVDS Transceiver

General Description

The DS91M040 is a quad M-LVDS transceiver designed for driving / receiving clock or data signals to / from up to four multipoint networks.

Key Features

  • 1.
  • 2 DC - 125 MHz / 250 Mbps Low Jitter, Low Skew, Low Power Operation.
  • Wide Input Common Mode Voltage Range Allows up to ±1V of GND Noise.
  • Conforms to TIA/EIA-899 M-LVDS Standard.
  • Pin Selectable M-LVDS Receiver Type (1 or 2).
  • Controlled Transition Times (2.0 ns typ) Minimize Reflections.
  • 8 kV ESD on M-LVDS I/O pins protects adjoining components.
  • Flow-Through Pinout Simplifies PCB Layout.
  • Small 5 mm x 5 mm WQFN-32 Space Savin.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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DS91M040 www.ti.com SNLS283M – FEBRUARY 2008 – REVISED APRIL 2013 DS91M040 125 MHz Quad M-LVDS Transceiver Check for Samples: DS91M040 FEATURES 1 •2 DC - 125 MHz / 250 Mbps Low Jitter, Low Skew, Low Power Operation • Wide Input Common Mode Voltage Range Allows up to ±1V of GND Noise • Conforms to TIA/EIA-899 M-LVDS Standard • Pin Selectable M-LVDS Receiver Type (1 or 2) • Controlled Transition Times (2.