DS92LV18
Description
The DS92LV18 Serializer/Deserializer (SERDES) pair transparently translates a 18–bit parallel bus into a BLVDS serial stream with embedded clock information.
Key Features
- Independent transmitter and receiver operation with separate clock, enable, and power down pins
- Hot plug protection (power up high impedance) and synchronization (receiver locks to random data)
- Wide ± 5% reference clock frequency tolerance for easy system design using locally-generated clocks
- Line and local loopback modes
- Robust BLVDS serial transmission across backplanes and cables for low EMI
- No external coding required
- Single +3.3V power supply
- Low power: 90mA (typ) transmitter, 100mA (typ) at 66 MHz with PRBS-15 pattern n ± 100 mV receiver input threshold
- Loss of lock detection and reporting pin
- Industrial −40 to +85˚C temperature range n > 2.0kV HBM ESD n pact, standard 80-pin PQFP package DS92LV18
