LP2994 Datasheet (PDF) Download
National Semiconductor
LP2994

Description

The LP2994 regulator is designed to provide a linear solution to meet the JEDEC SSTL-2 and SSTL-3 specifications (Series Stub Termination Logic) for active termination of DDRSDRAM. The device utilizes an internal operational amplifier to provide linear regulation of VTT without the need for expensive external components.

Key Features

  • n n n n n
  • Source and sink current Low external component count Independent analog and power rails Linear topology Small package SO-8 Low cost and easy to use Shutdown pin