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MM54HC73 - Dual J-K Flip-Flops

Description

These J-K Flip-Flops utilize advanced silicon-gate CMOS technology They possess the high noise immunity and low power dissipation of standard CMOS integrated circuits These devices can drive 10 LS-TTL loads These flip-flops are edge sensitive to the clock input and change state on the negative going

Features

  • Y Y Y Y Y Typical propagation delay 16 ns Wide operating voltage range 2.
  • 6V Low input current 1 mA maximum Low quiescent current 40 mA (74HC Series) High output drive 10 LS-TTL loads Connection and Logic Diagrams Dual-In-Line Package Truth Table Inputs CLR L H H H H H CLK X J X L H L H X K X L L H H X Outputs Q Q v v v v H L H Q0 Q0 H L L H TOGGLE Q0 Q0 Top View TL F 5072.
  • 1 Order Number MM54HC73 or MM74HC73 TL F 5072.
  • 2 TL F 5072.
  • 3 (1 of 2) C1995.

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