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PC16552D - Dual Universal Asynchronous Receiver/Transmitter with FIFOs

Datasheet Summary

Description

The PC16552D is a dual version of the PC16550D Universal Asynchronous Receiver Transmitter (UART) The two serial channels are completely independent except for a common CPU interface and crystal input On power-up both channels are functionally identical to the 16450 Each channel can operate with on-

Features

  • Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Y Dual independent UARTs Capable of running all existing 16450 and PC16550D software After reset all registers are identical to the 16450 register set Read and write cycle times of 84 ns In the FIFO mode transmitter and receiver are each buffered with 16-byte FIFOs to reduce the number of interrupts presented to the CPU Holding and shift registers in the 16450 Mode eliminate the need for precise synchronization between the CPU and serial data Adds or de.

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Datasheet Details

Part number PC16552D
Manufacturer National Semiconductor
File Size 291.59 KB
Description Dual Universal Asynchronous Receiver/Transmitter with FIFOs
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PC16552D Dual Universal Asynchronous Receiver Transmitter with FIFOs June 1995 PC16552D Dual Universal Asynchronous Receiver Transmitter with FIFOs General Description The PC16552D is a dual version of the PC16550D Universal Asynchronous Receiver Transmitter (UART) The two serial channels are completely independent except for a common CPU interface and crystal input On power-up both channels are functionally identical to the 16450 Each channel can operate with on-chip transmitter and receiver FIFOs (FIFO mode) to relieve the CPU of excessive software overhead In FIFO mode each channel is capable of buffering 16 bytes (plus 3 bits of error data per byte in the RCVR FIFO) of data in both the transmitter and receiver All the FIFO control logic is on-chip to minimize system overhead and maxi
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