PC87427 Datasheet | National Semiconductor

PC87427 Server I/O with Sensor Path™ Health Monitoring PRELIMINARY September 2003 Revision 1.0 PC87427 Server I/O with Sensor Path TM Health Monitoring General Description The National Semiconductor PC87427 is targeted for a wide range of servers, workstations and high-end desktops that use the Low Pin Count (LPC) bus for the host interface and an SMBus® interface for either a Baseboard Management Controller (BMC) or mini-BMC (m BMC), both of which are optional. For LPC and SMBus access, the PC87427 Features a fast X-Bus, over which boot flash and I/O devices can be accessed. The PC87427 supports X-Bus address line forcing (to 0 or 1) to create memory windows for BIOS data storage. When VSB exists, the BMC or m BMC can access the PC87427 and its fast X-Bus via SMBus. The SMBus also controls serial port float, RTC access, and serial port interconnection (snoop and take-over modes). In addition, the PC87427 provides routing of up to two selected LPC I/O port transactions to the GPIO Extension Port. The PC87427 provides a VSB-powered high-frequency clock for on-chip peripherals; it also provides a configurable highfrequency clock for other VSB-powered platform ponents. The PC87427 supports Sensor Path health monitor interface to LMPCxx sensors, fan monitoring and control, and a chassis intrusion detector. The System Wake-Up Control (SWC) module supports flexible wake-up and power-off request mechanisms for all platforms (i.e., with or without BMC/m BMC). The PC87427 supports both I/O and memory mapping of module registers and enables building legacy-free systems. The PC87427 also incorporates a Floppy Disk Controller (FDC), two serial ports (UARTs), a Keyboard and Mouse Controller (KBC), General-Purpose Input/Output (GPIO), GPIO extension for additional off-chip GPIO ports, and an interrupt serializer for parallel IRQs. Outstanding Features s Legacy-reduced Advanced I/O, optimized for high-end platforms. Legacy modules: FDC, two Serial Ports (UARTs) and a Keyboard and...