National Semiconductor SCANSTA112
The SCANSTA112 extends the IEEE Std. The advantage of a multidrop approach over a single serial scan chain is improved test throughput and the ability to remove a board from the system and retain test access to the remaining modules. Each SCANSTA112 supports up to 7 local IEEE1149.1 scan chains which can be accessed individually or combined serially.| Part No. | SCANSTA112 |
|---|---|
| Datasheet | SCANSTA112 Download |
| Manufacturer |  National Semiconductor |
| Description | 7-port Multidrop IEEE 1149.1 (JTAG) Multiplexer |
| Buy | Stock & Price |
GENERAL DESCRIPTION
The SCANSTA112 extends the IEEE Std. 1149.1 test bus into a multidrop test bus environment. Addressing is accomplished by loading the instruction register with a value matching that of the Slot inputs. Backplane and inter-board testing can easily be accomplished by parking the local TAP Controllers in one of the stable TAP Controller states via a Park instruction. The 32-bit TCK counter enables built in self test operations to be performed on one port while other scan chains are simultaneously tested. The STA112 has a unique feature in that the backplane port and the LSP0 port are bidirectional. They can be configured to alternatively act as the master or slave port so an alternate test master can take control of the entire scan chain network from the LSP0 port while the backplane port becomes a slave. n 7 IEEE 1149.1-compatible configurable local scan ports n Bi-directional Backplane and LSP0 ports are interchangeable slave ports n Capable of ignoring TRST of the b...
