SCANSTA112 Description
The SCANSTA112 extends the IEEE Std. 1149.1 test bus into a multidrop test bus environment. The advantage of a multidrop approach over a single serial scan chain is improved test throughput and the ability to remove a board from the system and retain test access to the remaining modules.
SCANSTA112 Key Features
- 2 True IEEE 1149.1 Hierarchical and Multidrop Addressable Capability
- The 8 Address Inputs Support up to 249 Unique Slot Addresses, an Interrogation Address, Broadcast Address, and 4 Multi-C
- 7 IEEE 1149.1-patible Configurable Local Scan Ports
- Bi-directional Backplane and LSP0 Ports are Interchangeable Slave Ports
- Capable of Ignoring TRST of the Backplane Port when it Bees the Slave
- Stitcher Mode Bypasses Level 1 and 2 Protocols
- Mode Register0 Allows Local TAPs to be Bypassed, Selected for Insertion into the Scan Chain Individually, or Serially in
- Transparent Mode can be Enabled with a Single Instruction to Conveniently Buffer the Backplane IEEE 1149.1 Pins to Those
- General Purpose Local Port Pass Through Bits are Useful for Delivering Write Pulses for Flash Programming or Monitoring
- Known Power-Up State