TP3067 Datasheet | National Semiconductor

TP3064 (m-law) and TP3067 (A-law) are monolithic PCM CODEC Filters utilizing the A D and D A conversion architecture shown in Figure 1 and a serial PCM interface The devices are fabricated using National’s advanced double-poly CMOS process (micro CMOS) Similar to the TP305X family these devices feature an additional Receive Power Amplifier to provide push-pull balanced output drive capability The receive gain can be adjusted by means of two external resistors for an output level of up to g 6 6V across a balanced 600X load Also included is an Analog Loopback switch and a TSX output See also AN-370 ‘‘Techniques for Designing with CODEC Filter BO Circuits ’’ Features Y Y Y Y Y Y Y Y BO tion and TRI-STATE are registered trademarks of National Semiconductor Corpora- Y plete CODEC and filtering system including Transmit high-pass and low-pass filtering Receive low-pass filter with sin x x correction Active RC noise filters m-law or A-law patible COder and DECoder Internal precision voltage reference Serial I O interface Internal auto-zero circuitry Receive push-pull power amplifiers m-law TP3064 A-law TP3067 Designed for D3 D4 and CCITT applications g 5V operation Low operating power typically 70 m W Power-down standby mode typically 3 m W Automatic power-down TTL or CMOS patible digital interfaces Maximizes line interface card circuit density Block Diagram TL H 5070 - 1 FIGURE 1 C1995 National Semiconductor Corporation TL H 5070 RRD-B30M115 Printed in U S A Connection Diagrams Dual-In-Line Package Plastic Chip Carrier TL H 5070 - 6 Top View Order Number TP3064J or TP3067J See NS Package J20A Order Number TP3064WM or TP3067WM See NS Package M20B TL H 5070- 2 Top View Order Number TP3064N or TP3067N See NS Package N20A Order Number TP3064V or TP3067V See NS Package V20A Pin Description Symbol VPO a GNDA VPOb VPI VFRO VCC FSR Function The non-inverted output of the receive power amplifier Analog ground All signals are referenced to this pin The inverted...