TP5089 Datasheet | National Semiconductor

Description The TP5089 is a low threshold voltage field-implanted metal gate CMOS integrated circuit It interfaces directly to a standard telephone keypad and generates all dual tone multi-frequency pairs required in tone-dialing systems The tone synthesizers are locked to an on-chip reference oscillator using an inexpensive 3 579545 MHz crystal for high tone accuracy The crystal and an output load resistor are the only external ponents required for tone generation A MUTE OUT logic signal which changes state when any key is depressed is also provided Features Y Y Y Y Y Y Y Y Y 3 5V - 10V operation when generating tones 2V operation of keyscan and MUTE logic Static sensing of key closures or logic inputs On-chip 3 579545 MHz crystal-controlled oscillator Output amplitudes proportional to supply voltage High group pre-emphasis Low harmonic distortion Open emitter-follower low-impedance output SINGLE TONE INHIBIT pin Block Diagram TL H 5057 - 1 FIGURE 1 C1995 National Semiconductor Corporation TL H 5057 RRD-B30M115 Printed in U S A Absolute Maximum Ratings If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications Supply Voltage (VDD b VSS) Maximum Voltage at Any Pin 15V VDD a 0 3V to VSS b 0 3V Operating Temperature Storage Temperature Maximum Power Dissipation b 30 C to a 60 C b 55 C to a 150 C 500 m W limits printed in BOLD characters are guaranteed for VDD e 3 5V to 10V TA e 0 C to a 60 C by correlation with 100% electrical testing at TA e 25 C All other limits are assured by correlation with other production tests and or product design and characterization Parameter Minimum Supply Voltage for Keysense and MUTE Logic Functions Minimum Operating Voltage for generating tones Operating Current Idle Generating Tones Input Resistors COLUMN and ROW (Pull-Up) SINGLE TONE INHIBIT (Pull-Down) TONE DISABLE (Pull-Up) Input Low Level Input High Level MUTE OUT Sink...