Description
These devices consist of bus transceiver circuits with D-type flip-flops and control circuitry arranged for multiplexed transmission of data directly from the input bus or from internal registers Data on the A or B bus will be clocked into the registers as the appropriate clock pin goes to HIGH logi
Features
- Y Y Y
Y
Independent registers for A and B buses Multiplexed real-time and stored data Choice of non-inverting and inverting data paths ’F651 inverting ’F652 non-inverting Guaranteed 4000V minimum ESD protection
Commercial 74F651SPC
Military
Package Number N24C
Package.
74F651 Datasheet
