MM54HC76 Datasheet | National

MM54HC76 MM74HC76 Dual J-K Flip-Flops with Preset and Clear January 1988 MM54HC76 MM74HC76 Dual J-K Flip-Flops with Preset and Clear General Description These high speed (30 MHz minimum) J-K Flip-Flops utilize advanced silicon-gate CMOS technology to achieve the low power consumption and high noise immunity of standard CMOS integrated circuits along with the ability to drive 10 LS-TTL loads Each flip-flop has independent J K PRESET CLEAR and CLOCK inputs and Q and Q outputs These devices are edge sensitive to the clock input and change state on the negative going transition of the clock pulse Clear and preset are independent of the clock and acplished by a low logic level on the...