100311 Datasheet | National Semiconductor

Description The 100311 contains nine low skew differential drivers, de- signed for generation of multiple, minimum skew differential clocks from a single differential input (Cl KIN, Cl KIN). If a single-ended input is desired, the VBB output pin may be used to drive the remaining input line. A HIGH on the enable run pin (EN) will force a l OW on all of the Cl Kn outputs and a HIGH on all of the output pins. The 100311 is ideal for distributing a signal throughout a system without worrying about the original signal being too corrupted by undesir- able delays and skew. The 100311 is pin-far-pin patible with the Motorola 100E111. Features - low output to output skew - 2000V ESD protection II 1:9 low skew clock driver II Differential inputs and outputs Ordering Code: See Section 5 Logic Symbol - -CLKo CLKo Cl K1 CLK1 Cl K2 CLK2 Cl K3 CLK3 Cl KIN ---r +-I~- Cl K. Cl KIN CLK. CLKs CLK5 Cl K& CLK& Cl K7 CLK7 L...+- - C l Ks CLKs --(>-Vee TL/F/l0648-1 Connection Diagram 28-Pln pee e LKs a Rs CLK7 Vo:J.W<7 CLKs a:Ra [I]!@]m[IDm[[]rn Pin Names Cl KIN, Cl KIN EN Cl Ko_s, Cl Ko_s VBB NC Truth Table el KIN l H X el KIN H l X CLK5 1i1l Cl K5 [i] CLK.[i] VCCA~ Cl K.1lli CLK3 [ZJ cl K3 @1 [I)NC rn Vee m Cl KIN [j]Vcc ~Cl KIN Ill JEN ~V££ [j])@I~Ill...