54ACQ573 Datasheet | National Semiconductor

Description The ’ACQ/’ACTQ573 is a high-speed octal latch with buffered mon Latch Enable (LE) and buffered mon Output Enable (OE) inputs. The ’ACQ/’ACTQ573 is functionally identical to the ’ACQ/’ACTQ373 but with inputs and outputs on opposite sides of the package. The ’ACQ/’ACTQ utilizes NSC Quiet Series technology to guarantee quiet output switching and improved dynamic threshold performance. FACT Quiet Series™ features GTO™ output control and undershoot corrector in addition to a split ground bus for superior performance. n Guaranteed simultaneous switching noise level and dynamic threshold performance n Improved latch-up immunity n Inputs and outputs on opposite sides of package allow easy interface with microprocessors n Outputs source/sink 24 m A n Faster prop delays than standard ’ACT573 n 4 k V minimum ESD immunity n Standard Microcircuit Drawing (SMD) - ’ACTQ573: 5962-92194 - ’ACQ573: 5962-92180 Features n ICC and IOZ reduced by 50% Logic Symbols IEEE/IEC DS100242-1 DS100242-2 Pin Names D0- D7 LE OE O0- O7 Data Inputs Description Latch Enable Input TRI-STATE Output Enable Input TRI-STATE Latch Outputs GTO™ is a trademark of National Semiconductor Corporation. TRI-STATE ® is a registered trademark of National Semiconductor Corporation. FACT ® is a registered trademark of Fairchild Semiconductor Corporation. FACT Quiet Series™ is a trademark of Fairchild Semiconductor Corporation. © 1998 National Semiconductor Corporation DS100242 .national. Connection Diagrams Pin Assignment for DIP and Flatpak Functional Description The ’ACQ/’ACTQ573 contains eight D-type latches with TRI-STATE output buffers. When the Latch Enable (LE) input is HIGH, data on the Dn inputs enters the latches. In this condition the latches are transparent, i.e., a latch output will change state each time its D input changes. When LE is LOW the latches store the information that was present on the D inputs a setup time preceding the HIGH-to-LOW transition of LE. The TRI-STATE buffers...