54FCT374 Datasheet | National Semiconductor

Description The ’FCT374 is an octal D-type flip-flop featuring separate D-type inputs for each flip-flop and TRI-STATE outputs for bus-oriented applications. A buffered Clock (CP) and Output Enable (OE) are mon to all flip-flops. Features n Edge-triggered D-type inputs n Buffered positive edge-triggered clock n TRI-STATE outputs for bus-oriented applications n TTL input and output level patible n Low CMOS power consumption n Output sink capability of 32 m A, source capability of 12 m A n Standard Microcircuit Drawing (SMD) 5962-9314901 Ordering Code Military 54FCT374DMQB 54FCT374FMQB 54FCT374LMQB Package Number J20A W20A E20A Connection Diagrams Pin Assignment for DIP and Flatpak Package Description 20-Lead Ceramic Dual-In-Line 20-Lead Cerpack 20-Lead Ceramic Leadless Chip Carrier, Type C Pin Assignment for LCC DS100964-1 DS100964-2 TRI-STATE® is a registered trademark of National Semiconductor Corporation. © 1999 National Semiconductor Corporation DS100964 .national. Pin Descriptions Pin Names D0- D7 CP O0- O7 Description Data Inputs Clock Pulse Input (Active Rising Edge) TRI-STATE Output Enable Input (Active LOW) TRI-STATE Outputs Functional Description The ’FCT374 consists of eight edge-triggered flip-flops with individual D-type inputs and TRI-STATE true outputs. The buffered clock and buffered Output Enable are mon to all flip-flops. The eight flip-flops will store the state of their individual D inputs that meet the setup and hold time requirements on the LOW-to-HIGH Clock (CP) transition. With the Output Enable (OE) LOW, the contents of the eight flip-flops are available at the outputs. When OE is HIGH, the outputs are in a high impedance state. Operation of the OE input does not affect the state of the flip-flops. Function Table Inputs Internal OE CP D H HL H HH H NL H NH L...