54LS169 Datasheet | National Semiconductor

Description This synchronous presettable counter features an internal carry look-ahead for cascading in high-speed counting applications Synchronous operation is provided by having all flip-flops clocked simultaneously so that the outputs all change at the same time when so instructed by the countenable inputs and internal gating This mode of operation helps eliminate the output counting spikes that are normally associated with asynchronous (ripple clock) counters A buffered clock input triggers the four master-slave flip-flops on the rising edge of the clock waveform This counter is fully programmable that is the outputs may each be preset either high or low The load input circuitry allows loading with the carry-enable output of cascaded counters As loading is synchronous setting up a low level at the load input disables...