ADC08D1000 Datasheet | National Semiconductor

Description NOTE: This product is currently in development. - ALL specifications are design targets and are subject to change. The ADC08D1000 is a dual, low power, high performance CMOS analog-to-digital converter that digitizes signals to 8 bits resolution at sampling rates up to 1.6 GSPS. Consuming a typical 1.6 Watts at 1 GSPS from a single 1.9 Volt supply, this device is guaranteed to have no missing codes over the full operating temperature range. The unique folding and interpolating architecture, the fully differential parator design, the innovative design of the internal sample-andhold amplifier and the self-calibration scheme enable a very flat response of all dynamic parameters beyond Nyquist, producing a high 7.5 ENOB with a 500 MHz input signal and a 1 GHz sample rate while providing a 10-18 B.E.R. Output formatting is offset binary and the LVDS digital outputs are pliant with IEEE 1596.3-1996, with the exception of a reduced mon mode voltage of 0.8V. Each converter has a 1:2 demultiplexer that feeds two LVDS buses and reduces the output data rate on each bus to half the sampling rate. The two converters can be interleaved and used as a single 2 GSPS ADC. The converter typically consumes less than 20 m W in the Power Down Mode and is available in a 128-lead, thermally enhanced exposed pad LQFP and operates over the industrial (-40˚C ≤ TA ≤ +85˚C) temperature range. Features n n n n n n n n Internal Sample-and-Hold Single +1.9V ± 0.1V Operation Choice of SDR or DDR output clocking Interleave Mode for 2x Sampling Rate Multiple ADC Synchronization Capability Guaranteed No Missing Codes Serial Interface for Extended Control Fine Adjustment of Input Full-Scale Range and Offset Key Specifications n n n n n n Resolution Max Conversion Rate Bit Error Rate ENOB @ 500 MHz Input DNL Power Consumption - Operating - Power Down Mode 8 Bits 1 GSPS (min) 10-18 (typ) 7.5 Bits (typ) ± 0.25 LSB (typ) 1.6 W (typ) 20 m W (typ) Applications n n n n n Direct RF Down...