ADC1061 Datasheet | National Semiconductor

Description Using a modified half-flash conversion technique, the 10-bit ADC1061 CMOS analog-to-digital converter offers very fast conversion times yet dissipates a maximum of only 235 m W. The ADC1061 performs a 10-bit conversion in two lower-resolution “flashes”, thus yielding a fast A/D without the cost, power dissipation, and other problems associated with true flash approaches. The analog input voltage to the ADC1061 is tracked and held by an internal sampling circuit. Input signals at frequencies from DC to greater than 160 k Hz can therefore be digitized accurately without the need for an external sample-and-hold circuit. For ease of interface to microprocessors, the ADC1061 has been designed to appear as a memory location or I/O port without the need for external interface logic. Features n n n n n n 1.8 µs maximum conversion time to 10 bits Low power dissipation: 235 m W (maximum) Built-in track-and-hold No external clock required Single +5V supply No missing codes over temperature Applications n n n n Waveform digitizers Disk drives Digital signal processor front ends Mobile telemunications Simplified Block and Connection Diagrams DS010559-2 TRI-STATE ® is a registered trademark of National Semiconductor Corporation. © 1999 National Semiconductor Corporation DS010559 .national. Simplified Block and Connection Diagrams (Continued) Dual-In-Line Package DS010559-1 Top View Order Number ADC1061CIN or ADC1061CIWM See NS Package J20A, M20B or N20A Ordering Information Industrial (- 40˚C ≤ TA ≤ 85˚C) ADC1061CIN ADC1061CIWM Package N20A M20B Pin Descriptions Symbol DVCC, AVCC (1, 6) INT (2) S /H (3) RD (4) Function These are the digital and analog positive supply voltage inputs. They should always be connected to the same voltage source, but are brought out separately to allow for separate bypass capacitors. Each supply pin should be bypassed with a 0.1 µF ceramic capacitor in parallel with a 10 µF tantalum capacitor. This is the active low interrupt...