CGS74B2528 Datasheet | National Semiconductor

Description These minimum skew clock drivers are designed for Clock Generation Support (CGS) applications operating above 50 MHz This device guarantees minimum output skew across the outputs of a given device Skew parameters are also provided as a means to measure duty cycle requirements as those found in high speed clocking systems The ’2528 is a minimum skew clock driver with one input driving ten outputs specifically designed for signal generation and clock distribution applications Features Y Clock Generation Support (CGS) devices ideal for high frequency signal generation or clock distribution applications Y CGS64 74B version features National’s Advanced Bipolar FAST LSI process Y 1-to-10 low skew clock distribution Y 450 ps pin-to-pin output skew for the PLCC package Y Specification for transition skew to meet duty cycle requirements Y 28-pin centered VCC and GND configuration for PLCC to minimize high speed switching noise Y Current sourcing 48 m A and current sinking of 64 m A Y Low dynamic power consumption above 20 MHz Y Guaranteed 4K volts ESD protection Y mercial and Industrial temperature availability Logic Symbol Connection Diagrams Pin Assignment for DIP and SOIC TL F 10984 - 1 Pin Assignment for PLCC TL F 10984 - 3 FAST is a registered trademark of National Semiconductor Corporation C1995 National Semiconductor Corporation TL F 10984 TL F 10984 - 5 RRD-B30M115 Printed in U S A Pin Description Pin Names CLK O0 - O9 Description Clock Input Outputs Truth Tables Inputs CLK L e Low Logic Level H e High Logic Level Outputs O0 - O9 L H TL F 10984- 7 Absolute Maximum Ratings (Note) If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications Supply Voltage (VCC) Input Voltage (VI) Operating Temperature 64 Grade 74 Grade 7 0V 7 0V b40 C to a85 C 0 C to a70 C Storage Temperature Range b65 C to a150 C Typical i...