CGS74B304 Datasheet | National Semiconductor

Description These minimum skew clock drivers are designed for high frequency Clock Generation & Support (CGS) applications. These devices are ideal for duty cycle recovery applications with internal frequency divide-by-2 circuitry. The devices guarantee minimum output skew across the outputs of a given device. Skew parameters are also provided as a means to measure duty cycle requirements as those found in high speed clocking systems. Functional Description The CGS74B304 contains eight flip-flops designed to have low skew between outputs. The eight outputs (eight inphase with Cl K) toggle on successive Cl K pulses. a a 'P'Ff E and ~ inputs are provided to set and outputs high or low independent of Cl K pin. Features - Clock Generation & Support (CGS) devices ideal for high frequency signal generation or clock distribution applications - CGS74B version features National's Advanced Bipolar FASTTt.t l SI process - 900 ps pin-to-pin output skew - Specification for transition skew to meet duty cycle re- quirements - Current sourcing 24 rn A and current sinking of 48 rn A - low dynamic power consumption above 20 MHz - Guaranteed 4 k V ESD protection Ordering Code: See Section 5 Connection Diagrams Pin Assignment for DIP and SOIC '304 Pin Description Pin Names el K 01-0 8 'P'Ff E ~ Description Clock Input Outputs Preset Clear TUF/11750-1 Logic Diagram Circuit de SCription of the '304 Pin Assignment 28-Pln PCC NC Os NC GND GND GND NC II] (j]] IIII!H!l1Il1Il Claim NC Irn o,ll] NC [j]) o.ll J] NC 1m PRE Ii!! III 04 rn NC III 03 rn NC 1m0z ID1 NC 1m 0, rm~[il- W1Il31- Cl K NC Vee Vee Vec NC CUi TUF/11750-2 Truth Table Inputs Outputs Cl R PRE Cl K 01-0 8...