COP840C Datasheet | National Semiconductor

Description Note: COP8SA devices are instruction set and pinout patible supersets of the COP800C Family devices, and are replacements for these in new designs when possible. The COP820C/840C Family ROM based microcontrollers are integrated COP8™ Base core devices with smaller memory (1k/2k), and fewer on-board features . These singlechip CMOS devices are suited for lower-functionality applications where system cost is of prime consideration. Pin and software patible (different VCC range) 4k/32k OTP ver Device COP620C COP820C COP920C COP622C COP822C COP922C COP640C COP840C COP940C COP642C COP842C COP942C Memory (bytes) 1k ROM 1k ROM 1k ROM 1k ROM 1k ROM 1k ROM 2k ROM 2k ROM 2k ROM 2k ROM 2k ROM 2k ROM RAM (bytes) 64 64 64 64 64 64 128 128 128 128 128 128 I/O Pins 24 24 24 16 16 16 24 24 24 16 16 16 sions are available (COP87Lxx CJ/RJ Family). Erasable windowed versions are available for use with a range of COP8 software and hardware development tools. Family features include an 8-bit memory mapped architecture, 10 Hz CKI with 1µs instruction cycle, one multi-function 16-bit timer/counter with PWM, MICROWIRE/PLUS™ serial I/O, power saving HALT mode, three clock modes, high current outputs, software selectable I/O options, 2.3v-6.0v operation and 20/28 pin packages. Devices included in this datasheet are: Packages 28 DIP/SOIC 28 DIP/SOIC 28 DIP/SOIC 20 DIP/SOIC 20 DIP/SOIC 20 DIP/SOIC 28 DIP/SOIC 28 DIP/SOIC 28 DIP/SOIC 20 DIP/SOIC 20 DIP/SOIC 20 DIP/SOIC Temperature -55 to +125˚C -40 to +85˚C 0 to +70˚C -55 to +125˚C -40 to +85˚C 0 to +70˚C -55 to +125˚C -40 to +85˚C 0 to +70˚C -55 to +125˚C -40 to +85˚C 0 to +70˚C 2.3v-4.0v, CH=4.0v-6.0v 2.3v-4.0v, CH=4.0v-6.0v 4.5v - 5.5v 2.3v-4.0v, CH=4.0v-6.0v 4.5v - 5.5v 2.3v-4.0v, CH=4.0v-6.0v 4.5v - 5.5v ments 4.5v - 5.5v Key Features n 16-bit multi-function timer supporting - PWM mode - External event counter mode - Input capture mode n 1024 bytes ROM/64 bytes RAM-COP820C n 2048 bytes ROM/128 bytes RAM-COP840C - 20 DIP/SO with...