DM54S194 Datasheet | National Semiconductor

Description These bidirectional shift registers are designed to incorporate virtually all of the features a system designer may want in a shift register they feature parallel inputs parallel outputs right-shift and left-shift serial inputs operating-modecontrol inputs and a direct overriding clear line The register has four distinct modes of operation namely Parallel (broadside) load Shift right (in the direction QA toward QD) Shift left (in the direction QD toward QA) Inhibit clock (do nothing) Synchronous parallel loading is acplished by applying the four bits of data and taking both mode control inputs S0 and S1 high The data are loaded into the associated flipflops and appear at the outputs after the positive transition of the clock input During loading serial data flow is inhibited Shift right is acplished synchronously with the rising edge of the clock pulse when S0 is high and S1 is low Serial data for this mode is entered at the shift-right data input When S0 is low and S1 is high data shifts left synchronously and new data is entered at the shift-left serial input Clocking of the flip-flop is inhibited when both mode control inputs are low Features Parallel inputs and outputs Four operating modes Synchronous parallel load Right shift Left shift Do nothing Positive edge-triggered clocking Direct overriding clear Typical clock frequency 105 MHz Typical power dissipation 425 m W Connection Diagram Dual-In-Line Package TL F 6475 - 1 Order Number DM54S194J or DM74S194N See NS Package Number J16A or N16E C1995 National Semiconductor Corporation TL F 6475 RRD-B30M105 Printed in U S A Absolute Maximum Ratings (Note) If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications Supply Voltage 7V Input Voltage 5 5V Operating Free Air Temperature Range b 55 C to a 125 C DM54S DM74S 0 C to a 70 C b 65 C to a 150 C Storage Temperature Range Note The...