DS90C032 Datasheet | National Semiconductor

Description The DS90C032 is a quad CMOS differential line receiver designed for applications requiring ultra low power dissipation and high data rates. The device is designed to support data rates in excess of 155.5 Mbps (77.7 MHz) utilizing Low Voltage Differential Signaling (LVDS) technology. The DS90C032 accepts low voltage (350 m V) differential input signals and translates them to CMOS (TTL patible) output levels. The receiver supports a TRI-STATE ® function that may be used to multiplex outputs. The receiver also supports OPEN, shorted and terminated (100Ω) input Fail-safe. Receiver output will be HIGH for all fail-safe conditions. The DS90C032 and panion line driver (DS90C031) provide a new alternative to high power psuedo-ECL devices for high speed point-to-point interface applications. Features n n n n n n n n n n n n n > 155.5 Mbps (77.7 MHz) switching rates Accepts small swing (350 m V) differential signal levels Ultra low power dissipation 600 ps maximum differential skew (5V, 25˚C) 6.0 ns maximum propagation delay Industrial operating temperature range Military operating temperature range option Available in surface mount packaging (SOIC) and (LCC) Pin patible with DS26C32A, MB570 (PECL) and 41LF (PECL) Supports OPEN, short and terminated input fail-safe patible with IEEE 1596.3 SCI LVDS standard Conforms to ANSI/TIA/EIA-644 LVDS standard Available to Standard Microcircuit Drawing (SMD) 5962-95834 Connection Diagrams Dual-In-Line LCC Package DS011945-1 Order Number DS90C032TM See NS Package Number M16A DS011945-20 Order Number DS90C032E-QML See NS Package Number E20A For plete Military Specifications, refer to appropriate SMD or MDS. TRI-STATE ® is a registered trademark of National Semiconductor Corporation. © 1998 National Semiconductor Corporation DS011945 .national. Functional Diagram and Truth Tables DS011945-2 RECEIVER ENABLES EN L All other binations of ENABLE inputs EN- H INPUTS RIN+ - RIN- X VID ≥ 0.1V VID ≤ - 0.1V Full Fail-safe...