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DS90C032 - LVDS Quad CMOS Differential Line Receiver

General Description

TheDS90C032 is a quad CMOS differential line receiver designed for applications requiring ultra low power dissipation and high data rates.

The device supports data rates in excess of 155.5 Mbps (77.7 MHz) and uses Low Voltage Differential Signaling (LVDS) technology.

Key Features

  • 1.
  • 2 >155.5 Mbps (77.7 MHz) switching rates.
  • Accepts small swing (350 mV) differential signal levels.
  • Ultra low power dissipation.
  • 600 ps maximum differential skew (5V, 25°C).
  • 6.0 ns maximum propagation delay.
  • Industrial operating temperature range.
  • Military operating temperature range option.
  • Available in surface mount packaging (SOIC) and (LCCC).
  • Pin compatible with DS26C32A, MB570 (PECL), and 41LF (PECL).

📥 Download Datasheet

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Other Datasheets by Texas Instruments

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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DS90C032 www.ti.com SNLS094D – JUNE 1998 – REVISED APRIL 2013 DS90C032 LVDS Quad CMOS Differential Line Receiver Check for Samples: DS90C032 FEATURES 1 •2 >155.5 Mbps (77.7 MHz) switching rates • Accepts small swing (350 mV) differential signal levels • Ultra low power dissipation • 600 ps maximum differential skew (5V, 25°C) • 6.0 ns maximum propagation delay • Industrial operating temperature range • Military operating temperature range option • Available in surface mount packaging (SOIC) and (LCCC) • Pin compatible with DS26C32A, MB570 (PECL), and 41LF (PECL) • Supports OPEN input fail-safe • Supports short and terminated input fail-safe with the addition of external failsafe biasing • Compatible with IEEE 1596.