INS8251 Datasheet | National Semiconductor

Description Features ii1 The INSB251 is a programmable Universal Synchronous/ - Synchronous and Asynchronous Full Duplex Asynchronous Receiver/Transmitter (USART) chip contained in a standard 2B-pin dual-in-line package_ The Operations - Synchronous Mode Capabilities Q) chip, which is fabricated using N-channel silicon gate technology, functions as a serial data input/output interface in National Semiconductor's NBOBO micro- - Selectable 5- to B-Bit Characters - Internal or External Character Synchronization - Automatic Sync Insertion C" CD puter family. The functional configuration of the INSB251 is programmed by the system software for - Asynchronous Mode Capabilities - Selectable 5- to B-Bit Characters ~ maximum flexibility, thereby allowing the system to receive and transmit virtu .-'Iy any serial data munica. tion signal presently in use (including IBM Bisync). The INSB251 can be programmed to receive and transmit either synchrpnous or asynchronous serial data_ The INSB251 performs serial-to-parallel conversion on data characters received from an input/output device or a MODEM, and parallel-to-serial conversion on data char~cters received from the CPU. The CPU can read the - 3 Selectable Clock Rates (1 x, 16x or 64x the Baud Rate) - Line Break Detection and Generation - 1-, 1%-, or 2-Stop Bit Detection and Generation - False Start Bit Detection - Baud Rates - DC to 56k Baud (Synchronous Mode) - DC to 9.6k Baud (Asynchronous Mode) - Transmission Error Detection Capabilities 3 c3 ::::s s~ - ::::s plete status of the INSB251 at any time during the - Parity functional operation. Status information reported - Overrun includes the type and the condition of the transfer - Framing operations being performed by the INSB251, as well as - Double Buffering of Data any transmission error conditions (parity, overrun, or framing). - TTL patible - Single TTL Clock - Reduces System ponent Count - MICROBUSTM- patible INS8251 MICROBUS...