LP2994 Datasheet | National Semiconductor

Description The LP2994 regulator is designed to provide a linear solution to meet the JEDEC SSTL-2 and SSTL-3 specifications (Series Stub Termination Logic) for active termination of DDRSDRAM. The device utilizes an internal operational amplifier to provide linear regulation of VTT without the need for expensive external ponents. The output stage prevents shoot through while delivering 1.5A continuous current and maintaining excellent load regulation. The LP2994 also incorporates an active low shutdown pin to tri-state the output during Suspend To Ram (STR) states. Patents Pending Features n n n n n n n Source and sink current Low external ponent count Independent analog and power rails Linear topology Small package SO-8 Low cost and easy to use Shutdown pin Applications n n n n SSTL-2 SSTL-3 DDR-SDRAM Termination DDR-II Termination Typical Application Circuit FIGURE 1. SSTL-2 VTT Termination © 2002 National Semiconductor Corporation DS200459 .national. Connection Diagram SO-8 (M08A) Package Top View Pin Description SO-8 Pin 1 2 3 4 5 6 7 8 Name NC GND VSENSE SD VDDQ AVIN PVIN VTT No internal connection Ground Feedback pin for regulating VTT Active low shutdown pin Input for internal reference equal to VDDQ/2 Analog input pin Power input pin Output voltage for connection to termination resistors Function Ordering Information Order Number LP2994M LP2994MX Package Type SO-8 SO-8 NSC Package Drawing M08A M08A Supplied As 95 Units per Rail 2500 Units Tape and Reel .national. Absolute Maximum Ratings (Note 1) Operating Range Junction Temp. Range (Note 3) AVIN Supply Voltage PVIN Supply Voltage SD Input Voltage VTT Output Voltage SO-8 Thermal Resistance (θJA) 0˚C to +125˚C 2.2V to 5.5V -0.3V to (AVIN + 0.3V) -0.3V to (AVIN + 0.3V) -0.3V to (PVIN + 0.3V) 151˚C/W If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications....